1. Field of the Invention
The present invention relates to a process for producing a high-density printed circuit board with plated throughholes, at high reproducibility and productivity.
2. Description of the Prior Art
In recent years, attention has been paid to processes for producing a printed wiring board by applying an actinic radiation in the shape of a pattern to be obtained, using no photomask, for example, by applying, onto a resist coated on a copper-clad laminated substrate or the like, a laser beam (e.g. an argon ion laser beam) of raster mode which is controlled by CAD data and which goes on and off at a high speed in correspondence to the shape of a pattern to be formed (this is a direct drawing method by laser), or by applying an actinic radiation onto a copper-clad laminated substrate via a liquid crystal projector, because the above processes can assure a high alignment accuracy required in the production of printed wiring board used for high-density multilayer printed wiring board and also allow for production of high-density printed wiring board in many kinds and small quantities.
As the resist usable in the above processes, a resist to which a laser beam (e.g. an argon ion laser beam) is applicable, is disclosed in Japanese Patent Application Kokai (Laid-Open) No. 233736/1986 and Japanese Patent Application Kokai (Laid-Open) No. 31848/1987 (corresponding to U.S. Pat. No. 4,766,055). Also, a resist composition of high photosensitivity very suitable for the above processes is disclosed by the present inventors in Japanese Patent Application Kokai (Laid-Open) No. 223759/1991 (corresponding to U.S. Pat. No. 5,045,434).
With these resists, however, it is impossible to form a conductor circuit on a wiring substrate with plated throughholes, only by coating them on a copper-clad laminated substrate. The present inventors previously proposed, in Japanese Patent Application Kokai (Laid-Open) No. 179064/1991 (corresponding to U.S. Pat. No. 5,102,775), Japanese Patent Application Kokai (Laid-Open) No. 223759/1991 (corresponding to U.S. Pat. No. 5,045,434), etc., a resist suitable for use in the above processes, which is coatable even on the plated areas of the walls of substrate throughholes by electrodeposition and which is curable by the use of an argon ion laser beam or the like. It is extremely difficult, however, to sufficiently irradiate the resist coated on the walls of throughholes, with a laser beam and cure the coated resist, making impossible the actual formation of highly reliable throughholes.
Meanwhile, when an actinic radiation is applied via a liquid crystal projector, irradiation of throughhole inside is possible, for example, by applying an actinic radiation as a scattered light or by allowing a light source to scan. Even with these methods, however, it is impossible to completely irradiate the resist present inside the fine throughholes of 0.3 mm or less in diameter and cure the resist to a required extent. Also in such irradiation methods, the parallelism of applied light is lost; the sufficient irradiation of throughholes makes excessive the irradiation of the resist present on the copper foil; thereby, the resolution of pattern is reduced. Thus, with these methods, it is generally impossible to produce a high-density printed circuit board having throughholes, at high reliability.
In order to solve the above problem, there was proposed, in Japanese Patent Application Kokai (Laid-Open) No. 175691/1991, a process for forming a wiring board by protecting throughholes with a hole-filling ink and then coating a resist and further by using a direct drawing method. This process using a hole-filling ink, however, has many problems as pointed out in Japanese Patent Application Kokai (Laid-Open) No. 25998/1988, etc. and is not preferable as a process for producing a high-density printed circuit board.
In order to eliminate the problems of the process using a hole-filling ink, there was proposed, in Japanese Patent Application Kokai (Laid-Open) No. 25998/1988, a process for producing a printed wiring board with plated throughholes, which comprises forming, by electrodeposition, a resin layer on both sides of a throughholes-plated substrate as well as on the entire walls of the substrate throughholes, removing only the resin layer present on both sides of the substrate, forming a resist film on both sides of the substrate in the shape of a pattern to be obtained, removing, by etching, the electro-conductive metal layer and the plating layer formed thereon, both of the substrate portion having no resist film thereon, and removing the resist film and the resin layer inside the throughholes.
Even in this process, however, the resin layer formed by electrodeposition on the areas other than throughholes must be removed by polishing or the like, and some of the problems of the process using a hole-filling ink, for example, the bad working environment invited by the resin powder generating during polishing remains unresolved.
For the removal of the electrodeposition resin film present on the areas other than throughholes, a method of buffing, paper polishing or the like is described in Japanese Patent Application Kokai (Laid-Open) No. 25998/1988. However, in order to completely remove, by buffing, paper polishing or the like, the resin film present in the vicinity of fine throughholes of 300 .mu.m or less in diameter without damaging the resin film present at each throughhole corner, close attention must be paid and a long time is required. Moreover, remaining, on the substrate, of even a very small amount of the resin powder generating during the removal of the resin film gives rise to circuit defects such as wire breakage, shortcircuiting and the like, leading to reduced yield particularly in production of high-density printed wiring board.
Further in Japanese Patent Application Kokai (Laid-Open) No. 224393/1988 was proposed a process for producing a printed wiring board with plated throughholes, which comprises forming, on both sides of a substrate with plated throughholes, a resist film in the shape of a pattern reverse to a circuit pattern to be obtained, forming an electrodeposition resin layer by electrodeposition on the walls of the substrate throughholes as well as on the portion of each side of the substrate having no resist film, heat-treating the electrodeposition resin layer, removing only the resist film, removing, by etching, the plating layer portion (exposed by the removal of the resist film) and the electro-conductive metal layer portion present therebeneath, and removing the electrodeposition resin layer.
The above process is free from the problems of the process using a hole-filling ink and requires no removal of electrodeposition resin film mentioned in Japanese Patent Application Kokai (Laid-Open) No. 25998/1988. In the process, however, the resist film formed in the shape of a reverse pattern after the formation of the electrodeposition resin layer must be removed selectively. This removal becomes difficult often as the circuit pattern becomes a higher density, the line width of pattern becomes smaller and the space between lines becomes smaller, which produces defective products.